[opt] optimize nanovllm performance compareable with vllm.

This commit is contained in:
Zijie Tian
2025-12-25 03:47:07 +08:00
parent 16fcf8350b
commit 82ed34fc2d
7 changed files with 450 additions and 208 deletions

175
CLAUDE.md
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@@ -37,7 +37,22 @@ Decode: slot[0] = decode, slots[1:] = load previous chunks
- `offload_slot_to_cpu(slot, cpu_block)`: Async D2H offload
- Per-slot per-layer CUDA events for fine-grained synchronization
**Pipeline**: Double buffering with `compute_done` events prevents data races. Pipeline depth = N-1 (prefill), (N-1)/2 (decode).
**Pipeline**: N-way pipeline with dedicated streams for full compute-transfer overlap. Pipeline depth = N-1 (prefill), (N-1)/2 (decode).
### Stream Architecture
```
Transfer Streams: [slot_0_stream] [slot_1_stream] ... [slot_N_stream]
↓ ↓ ↓
GPU Slots: [slot_0] [slot_1] ... [slot_N]
↓ ↓ ↓
Compute Stream: ←←←←←←←←←←←← [dedicated compute stream] →→→→→→→→→→→→
```
**Key Design Decisions**:
- **Per-slot transfer streams**: Each GPU slot has its own CUDA stream for H2D transfers, enabling parallel loading
- **Dedicated compute stream**: Created with `torch.cuda.Stream()` (NOT `current_stream()`) to avoid implicit synchronization with default stream
- **CUDA Events**: `ring_slot_ready` (transfer complete), `ring_slot_compute_done` (safe to overwrite)
## Scatter-Gather DMA (sgDMA) - INTEGRATED ✓
@@ -112,6 +127,99 @@ memcpy_2d_async(
**Actual Impact**: 15.35x faster D2H transfers, eliminates memory transfer bottleneck. Expected 2-3x overall prefill throughput improvement.
## Online Softmax Merge - Triton Fused Kernel ✓
### Problem & Solution
**Problem**: Original PyTorch implementation of `merge_attention_outputs()` launches 7 separate kernels per merge operation:
1. `torch.maximum()` - max(lse1, lse2)
2. `torch.exp()` (2x) - exp(lse1-max), exp(lse2-max)
3. `transpose()` + `unsqueeze()` - reshape for broadcasting
4. Accumulation (6x) - weighted sum operations
5. Division - normalize output
6. `torch.log()` - merge LSE
7. `.to()` - type conversion
**Profiling revealed**: In ChunkedPrefill with 8 layers, these operations consumed **698 ms** GPU time (vs FlashAttention 603 ms), becoming a major bottleneck.
**Solution**: Implemented Triton fused kernels that combine all operations into 2 kernels. **Integration complete** as of 2025-12-25.
### Implementation
**File**: `nanovllm/kvcache/chunked_attention.py:278-408`
Two Triton kernels replace all PyTorch operations:
```python
@triton.jit
def _merge_lse_kernel(...):
"""Fused: max + exp + log"""
max_lse = tl.maximum(lse1, lse2)
exp1 = tl.exp(lse1 - max_lse)
exp2 = tl.exp(lse2 - max_lse)
lse_merged = max_lse + tl.log(exp1 + exp2)
tl.store(lse_out_ptr + offsets, lse_merged, mask=mask)
@triton.jit
def _merge_output_kernel(...):
"""Fused: broadcast + weighted sum + division"""
# Load LSE, compute scaling factors
exp1 = tl.exp(lse1 - max_lse)
exp2 = tl.exp(lse2 - max_lse)
sum_exp = exp1 + exp2
# Process headdim in chunks
for d_offset in range(0, headdim, BLOCK_SIZE):
o1_val = tl.load(o1_ptr + o_idx, mask=mask)
o2_val = tl.load(o2_ptr + o_idx, mask=mask)
o_merged = (o1_val * exp1 + o2_val * exp2) / sum_exp
tl.store(o_out_ptr + o_idx, o_merged, mask=mask)
```
### Performance Results
**From `test_attention_offload.py` profiling** (8 layers, 16K tokens, 16 chunks, 10 iterations):
| Metric | PyTorch (7 kernels) | Triton (2 kernels) | Speedup |
|--------|---------------------|---------------------|---------|
| **GPU time (8 layers)** | 698 ms | 160.7 ms | **4.3x** |
| **Per-layer time** | 87.3 ms | 20.1 ms | **4.3x** |
| **Avg per merge** | 56 µs | 12.9 µs | **4.3x** |
| **Kernel launches** | 10,920 | 3,120 | **71% reduction** |
**Breakdown** (per-layer, 1,560 merges):
- `_merge_output_kernel`: 126.9 ms / 8 = 15.9 ms/layer (avg 10.2 µs/call)
- `_merge_lse_kernel`: 33.8 ms / 8 = 4.2 ms/layer (avg 2.7 µs/call)
### Overall ChunkedPrefill Impact
**GPU time distribution** (test_attention_offload.py):
| Component | Time (ms) | Percentage |
|-----------|-----------|------------|
| FlashAttention | 603.2 | 74.8% |
| Triton Merge | 160.7 | 19.9% |
| Other | 42.1 | 5.3% |
| **Total** | **806.0** | **100%** |
**If using PyTorch merge** (estimated):
- Total GPU time: ~1,343 ms
- **Overall speedup with Triton**: 1.67x
### Correctness Verification
**Test**: `tests/test_chunked_attention.py`
- 12 test cases (6 configs × 2 dtypes)
- All tests PASS with max error < 0.01
- float16: max_diff=0.000488, mean_diff~0.00001
- bfloat16: max_diff=0.003906, mean_diff~0.0001
### Key Files
- `nanovllm/kvcache/chunked_attention.py`: Triton kernels + merge function
- `tests/test_chunked_attention.py`: Correctness tests
- `tests/test_attention_offload.py`: Performance profiling
## Configuration
| Parameter | Default | Notes |
@@ -134,38 +242,57 @@ memcpy_2d_async(
- Qwen3-0.6B/4B: 40960 tokens
- Qwen2.5-7B-Instruct-1M: 1048576 tokens
**Performance (Qwen3-0.6B, 40K)**:
**Performance (Qwen3-0.6B)**:
- GPU: ~18k tok/s (prefill), ~100 tok/s (decode)
- CPU Offload: ~7.2k tok/s (prefill), ~3.5 tok/s (decode)
- CPU Offload (16K): ~14k tok/s (prefill)
- CPU Offload (32K): ~13k tok/s (prefill)
## TODO: Alternative Optimizations
## Performance Summary
### 1. Pure PyTorch Layout Reorganization (Alternative to sgDMA)
### Completed Optimizations ✓
**Note**: sgDMA (above) already solves this. This is a pure-PyTorch alternative requiring more code changes.
1. **sgDMA Integration** (2025-12-25)
- Eliminated Device→Pageable transfers
- Achieved 21-23 GB/s bandwidth (near PCIe limit)
- 15.35x speedup on memory transfers
**Change Layout**:
```python
# Current (non-contiguous access)
k_cache_cpu = torch.zeros(num_layers, num_cpu_blocks, block_size, kv_heads, head_dim,
pin_memory=True)
# Access: k_cache_cpu[:, block_id] -> strided, slow
2. **Triton Fused Merge Kernel** (2025-12-25)
- Reduced 7 PyTorch kernels → 2 Triton kernels
- 4.3x speedup on merge operations
- 1.67x overall ChunkedPrefill speedup
# Optimized (contiguous access)
k_cache_cpu = torch.zeros(num_cpu_blocks, num_layers, block_size, kv_heads, head_dim,
pin_memory=True)
# Access: k_cache_cpu[block_id] -> contiguous, fast
```
3. **N-way Pipeline with Dedicated Streams** (2025-12-25)
- Per-slot transfer streams for parallel H2D across slots
- Dedicated compute stream (avoids CUDA default stream implicit sync)
- N-way pipeline using all available slots (not just 2-slot double buffering)
- **2.0x improvement**: 7.2k → 14.1k tok/s (16K tokens prefill)
**Files to Modify**:
- `kvcache/offload_engine.py`: Update all indexing in `load_to_slot_layer()`, `offload_slot_to_cpu()`
- Audit all `k_cache_cpu`/`v_cache_cpu` accesses
### Current Performance Bottlenecks
**Trade-off**:
- **sgDMA**: Minimal code changes, requires CUDA extension, 24.95 GB/s
- **Layout Change**: Pure PyTorch, extensive refactoring, 24.91 GB/s (same performance)
**From profiling** (`test_attention_offload.py`, 8 layers, 16K tokens):
**Recommendation**: Use sgDMA for faster implementation with same performance.
| Component | GPU Time | Percentage | Optimization Potential |
|-----------|----------|------------|------------------------|
| FlashAttention | 603 ms | 74.8% | ⚠️ Main bottleneck |
| Triton Merge | 161 ms | 19.9% | ✓ Optimized |
| Other | 42 ms | 5.3% | Minor |
### Future Optimization Directions
1. **FlashAttention Optimization** (highest priority)
- Current: 74.8% of GPU time
- Potential: Custom FlashAttention kernel for chunked case
- Expected: 1.5-2x additional speedup
2. ~~**Pipeline Optimization**~~ ✓ COMPLETED
- ~~Better overlap between compute and memory transfer~~
- ~~Multi-stream execution~~
- See: N-way Pipeline with Dedicated Streams above
3. **Alternative to sgDMA** (lower priority, PyTorch-only)
- Reorganize cache layout: `[num_cpu_blocks, num_layers, ...]` instead of `[num_layers, num_cpu_blocks, ...]`
- Trade-off: Extensive refactoring vs minimal sgDMA approach
- Same performance as sgDMA (~24 GB/s)
---

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@@ -34,28 +34,33 @@ def bench_prefill(llm, num_seqs, input_len):
def main():
path = os.path.expanduser("~/models/Qwen3-0.6B/")
# Note: Qwen3-0.6B max_position_embeddings = 40960, cannot exceed this
max_len = 40960
import argparse
parser = argparse.ArgumentParser()
parser.add_argument("--input-len", type=int, default=None, help="Input length in tokens")
parser.add_argument("--output-len", type=int, default=128, help="Output length in tokens")
args = parser.parse_args()
path = os.path.expanduser("~/models/Qwen3-4B-Instruct-2507/")
# Note: Qwen3-4B-Instruct-2507 max_position_embeddings = 262144
max_len = 131072 # 128K tokens
llm = LLM(path, enforce_eager=False, max_model_len=max_len, max_num_batched_tokens=max_len)
# Warmup
llm.generate(["Benchmark: "], SamplingParams())
print("=" * 60)
print("Prefill Benchmark")
print("=" * 60)
# bench_prefill(llm, num_seqs=1, input_len=1024)
# bench_prefill(llm, num_seqs=1, input_len=2048)
bench_prefill(llm, num_seqs=1, input_len=max_len - 1)
# bench_prefill(llm, num_seqs=16, input_len=1024)
# bench_prefill(llm, num_seqs=64, input_len=1024)
# Default input lengths based on max_len
prefill_input_len = args.input_len if args.input_len else max_len - 1
decode_input_len = args.input_len if args.input_len else max_len - args.output_len
print("=" * 60)
print("Decode Benchmark")
print("Prefill Benchmark (GPU)")
print("=" * 60)
# bench_decode(llm, num_seqs=1, input_len=1024, output_len=1024)
bench_decode(llm, num_seqs=1, input_len=max_len - 128, output_len=128) # input + output <= max_len
bench_prefill(llm, num_seqs=1, input_len=prefill_input_len)
# print("=" * 60)
# print("Decode Benchmark (GPU)")
# print("=" * 60)
# bench_decode(llm, num_seqs=1, input_len=decode_input_len, output_len=args.output_len)
if __name__ == "__main__":

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@@ -99,16 +99,16 @@ def main():
parser.add_argument("--output-len", type=int, default=128, help="Output length in tokens")
args = parser.parse_args()
path = os.path.expanduser("~/models/Qwen3-0.6B/")
# Note: Qwen3-0.6B max_position_embeddings = 40960, cannot exceed this
max_len = 40960
path = os.path.expanduser("~/models/Qwen3-4B-Instruct-2507/")
# Note: Qwen3-4B-Instruct-2507 max_position_embeddings = 262144
max_len = 131072 # 128K tokens
llm = LLM(
path,
enforce_eager=False,
max_model_len=max_len,
max_num_batched_tokens=max_len,
enable_cpu_offload=True,
num_gpu_blocks=8, # Small GPU buffer for offload testing
num_gpu_blocks=6, # Small GPU buffer for offload testing
)
if not args.no_sparse:
@@ -130,10 +130,10 @@ def main():
print("=" * 60)
bench_prefill(llm, num_seqs=1, input_len=prefill_input_len)
print("=" * 60)
print("Decode Benchmark (CPU Offload)")
print("=" * 60)
bench_decode(llm, num_seqs=1, input_len=decode_input_len, output_len=args.output_len)
# print("=" * 60)
# print("Decode Benchmark (CPU Offload)")
# print("=" * 60)
# bench_decode(llm, num_seqs=1, input_len=decode_input_len, output_len=args.output_len)
if __name__ == "__main__":

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@@ -37,28 +37,33 @@ def bench_prefill(llm, num_seqs, input_len):
def main():
path = os.path.expanduser("~/models/Qwen3-0.6B/")
# Note: Qwen3-0.6B max_position_embeddings = 40960, cannot exceed this
max_len = 40960
import argparse
parser = argparse.ArgumentParser()
parser.add_argument("--input-len", type=int, default=None, help="Input length in tokens")
parser.add_argument("--output-len", type=int, default=128, help="Output length in tokens")
args = parser.parse_args()
path = os.path.expanduser("~/models/Qwen3-4B-Instruct-2507/")
# Note: Qwen3-4B-Instruct-2507 max_position_embeddings = 262144
max_len = 131072 # 128K tokens
llm = LLM(path, enforce_eager=False, max_model_len=max_len, max_num_seqs=128, gpu_memory_utilization=0.9)
# Warmup
llm.generate([dict(prompt_token_ids=[0])], SamplingParams())
print("=" * 60)
print("Prefill Benchmark")
print("=" * 60)
# bench_prefill(llm, num_seqs=1, input_len=1024)
# bench_prefill(llm, num_seqs=1, input_len=2048)
bench_prefill(llm, num_seqs=1, input_len=max_len - 1)
# bench_prefill(llm, num_seqs=16, input_len=1024)
# bench_prefill(llm, num_seqs=64, input_len=1024)
# Default input lengths based on max_len
prefill_input_len = args.input_len if args.input_len else max_len - 1
decode_input_len = args.input_len if args.input_len else max_len - args.output_len
print("=" * 60)
print("Decode Benchmark")
print("Prefill Benchmark (vLLM)")
print("=" * 60)
# bench_decode(llm, num_seqs=1, input_len=1024, output_len=1024)
bench_decode(llm, num_seqs=1, input_len=max_len - 128, output_len=128) # input + output <= max_len
bench_prefill(llm, num_seqs=1, input_len=prefill_input_len)
# print("=" * 60)
# print("Decode Benchmark (vLLM)")
# print("=" * 60)
# bench_decode(llm, num_seqs=1, input_len=decode_input_len, output_len=args.output_len)
if __name__ == "__main__":

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@@ -141,11 +141,20 @@ class OffloadEngine:
# ========== Transfer streams for async operations ==========
self.transfer_streams = [torch.cuda.Stream() for _ in range(num_streams)]
self.compute_stream = torch.cuda.current_stream()
# IMPORTANT: Create a dedicated compute stream (not default stream!)
# Default stream has implicit synchronization with other streams,
# which prevents overlap between transfer and compute.
self.compute_stream = torch.cuda.Stream()
self._stream_idx = 0
# ========== Per-slot transfer streams for parallel H2D ==========
# Each slot has its own stream to enable parallel transfers
# This allows multiple slots to load simultaneously
self.slot_transfer_streams = [torch.cuda.Stream() for _ in range(self.num_ring_slots)]
logger.info(f" Created {self.num_ring_slots} per-slot transfer streams")
# ========== Ring Buffer dedicated stream and events ==========
self.transfer_stream_main = torch.cuda.Stream() # Main transfer stream
self.transfer_stream_main = torch.cuda.Stream() # Main transfer stream (for legacy/batch ops)
# Decode offload event
self.decode_offload_done = torch.cuda.Event()
@@ -174,6 +183,13 @@ class OffloadEngine:
for _ in range(self.num_ring_slots)
]
# Initialize all compute_done events (record them once)
# This prevents undefined behavior on first load_to_slot_layer call
for slot_idx in range(self.num_ring_slots):
for layer_id in range(num_layers):
self.ring_slot_compute_done[slot_idx][layer_id].record()
torch.cuda.synchronize() # Ensure all events are recorded
# ========== Event tracking for async transfers ==========
self.pending_events: Dict[Tuple[int, int], torch.cuda.Event] = {}
@@ -676,11 +692,14 @@ class OffloadEngine:
"""
logger.debug(f"Ring load: layer={layer_id}, CPU[{cpu_block_id}] -> GPU slot[{slot_idx}]")
# Use per-slot stream for parallel transfers across different slots
stream = self.slot_transfer_streams[slot_idx]
torch.cuda.nvtx.range_push(f"H2D: L{layer_id} CPU[{cpu_block_id}]->Slot[{slot_idx}]")
with torch.cuda.stream(self.transfer_stream_main):
with torch.cuda.stream(stream):
# Wait for previous compute on this slot to complete before overwriting
# This prevents data race: transfer must not start until attention finishes reading
self.transfer_stream_main.wait_event(self.ring_slot_compute_done[slot_idx][layer_id])
stream.wait_event(self.ring_slot_compute_done[slot_idx][layer_id])
self.k_cache_gpu[layer_id, slot_idx].copy_(
self.k_cache_cpu[layer_id, cpu_block_id], non_blocking=True
@@ -688,7 +707,7 @@ class OffloadEngine:
self.v_cache_gpu[layer_id, slot_idx].copy_(
self.v_cache_cpu[layer_id, cpu_block_id], non_blocking=True
)
self.ring_slot_ready[slot_idx][layer_id].record(self.transfer_stream_main)
self.ring_slot_ready[slot_idx][layer_id].record(stream)
torch.cuda.nvtx.range_pop()
def wait_slot_layer(self, slot_idx: int, layer_id: int) -> None:

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@@ -287,46 +287,56 @@ class Attention(nn.Module):
o_acc, lse_acc = merge_attention_outputs(o_acc, lse_acc, prev_o, prev_lse)
return o_acc, lse_acc
# Double buffering with 2 slots
slot_A = load_slots[0]
slot_B = load_slots[1]
# N-way pipeline: use ALL available slots for maximum overlap
# Pipeline depth = num_slots - 1 (num_slots blocks in flight)
num_slots = len(load_slots)
# Pre-load first block to slot_A (async)
offload_engine.load_to_slot_layer(slot_A, self.layer_id, cpu_block_table[0])
# Phase 1: Pre-load up to num_slots blocks to fill the pipeline
# This starts all transfers in parallel, utilizing full PCIe bandwidth
num_preload = min(num_slots, num_blocks)
for i in range(num_preload):
offload_engine.load_to_slot_layer(load_slots[i], self.layer_id, cpu_block_table[i])
# Phase 2: Main loop - compute and immediately reuse slot for next transfer
# Use dedicated compute_stream (not default stream) to enable overlap with transfers
compute_stream = offload_engine.compute_stream
for block_idx in range(num_blocks):
torch.cuda.nvtx.range_push(f"PipelineBlock: L{self.layer_id} B{block_idx}")
# Alternate between slot_A and slot_B
current_slot = slot_A if block_idx % 2 == 0 else slot_B
next_slot = slot_B if block_idx % 2 == 0 else slot_A
# Cycle through slots: slot[block_idx % num_slots]
current_slot = load_slots[block_idx % num_slots]
# Wait for current slot's transfer to complete
# Wait for current slot's transfer to complete (on compute_stream)
offload_engine.wait_slot_layer(current_slot, self.layer_id)
# Start async load of next block to the OTHER slot
# load_to_slot_layer internally waits for next_slot's compute_done
if block_idx + 1 < num_blocks:
offload_engine.load_to_slot_layer(next_slot, self.layer_id, cpu_block_table[block_idx + 1])
# Compute attention on current slot's data
torch.cuda.nvtx.range_push(f"FlashAttn: L{self.layer_id} PrevBlock{block_idx}")
prev_k, prev_v = offload_engine.get_kv_for_slot(current_slot, self.layer_id)
prev_o, prev_lse = flash_attn_with_lse(
q_batched, prev_k, prev_v,
softmax_scale=self.scale,
causal=False,
)
torch.cuda.nvtx.range_pop()
# IMPORTANT: Use dedicated compute_stream to avoid implicit sync with default stream
with torch.cuda.stream(compute_stream):
torch.cuda.nvtx.range_push(f"FlashAttn: L{self.layer_id} PrevBlock{block_idx}")
prev_k, prev_v = offload_engine.get_kv_for_slot(current_slot, self.layer_id)
prev_o, prev_lse = flash_attn_with_lse(
q_batched, prev_k, prev_v,
softmax_scale=self.scale,
causal=False,
)
torch.cuda.nvtx.range_pop()
# Record compute done - this allows the next round to safely load into this slot
offload_engine.record_slot_compute_done(current_slot, self.layer_id)
# Record compute done - this allows the next transfer to safely overwrite this slot
offload_engine.record_slot_compute_done(current_slot, self.layer_id)
# Merge with accumulated
if o_acc is None:
o_acc, lse_acc = prev_o, prev_lse
else:
o_acc, lse_acc = merge_attention_outputs(o_acc, lse_acc, prev_o, prev_lse)
# Immediately start loading the NEXT block into this slot (if more blocks remain)
# Key insight: reuse current_slot immediately after compute is done!
next_block_idx = block_idx + num_slots
if next_block_idx < num_blocks:
offload_engine.load_to_slot_layer(current_slot, self.layer_id, cpu_block_table[next_block_idx])
# Merge with accumulated (also on compute_stream for consistency)
with torch.cuda.stream(compute_stream):
if o_acc is None:
o_acc, lse_acc = prev_o, prev_lse
else:
o_acc, lse_acc = merge_attention_outputs(o_acc, lse_acc, prev_o, prev_lse)
torch.cuda.nvtx.range_pop() # PipelineBlock

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@@ -1,13 +1,21 @@
"""
Test Attention layer with KV cache offload in isolation.
Test Attention layer with KV cache offload - N-way Pipeline.
This test demonstrates how to use Attention + HybridKVCacheManager directly
without requiring full LLMEngine/ModelRunner setup.
This test demonstrates and verifies the N-way pipeline with:
- Per-slot transfer streams for parallel H2D
- Dedicated compute stream (avoids CUDA default stream implicit sync)
- Pre-load phase + main loop with immediate slot reuse
Key difference from previous test:
- We first pre-fill many chunks to CPU cache
- Then simulate processing a new chunk that loads ALL previous blocks
- This exercises the full N-way pipeline with many blocks in flight
"""
import torch
from nanovllm.layers.attention import Attention
from nanovllm.kvcache.hybrid_manager import HybridKVCacheManager
from nanovllm.kvcache.chunked_attention import flash_attn_with_lse, merge_attention_outputs
from nanovllm.engine.sequence import Sequence
from nanovllm.utils.context import set_context, reset_context
@@ -16,45 +24,40 @@ from nanovllm.utils.context import set_context, reset_context
# Configuration
# ============================================================
NUM_LAYERS = 8 # Multi-layer for realistic profiling
NUM_LAYERS = 8
NUM_HEADS = 8
NUM_KV_HEADS = 8
HEAD_DIM = 64
BLOCK_SIZE = 1024 # tokens per block
CHUNK_SIZE = 1024 # tokens per chunk (same as block for simplicity)
BLOCK_SIZE = 1024
CHUNK_SIZE = 1024
NUM_GPU_SLOTS = 4
NUM_CPU_BLOCKS = 16
NUM_GPU_SLOTS = 6 # N-way pipeline with 6 slots
NUM_CPU_BLOCKS = 16 # Many blocks to load from CPU
DTYPE = torch.float16
DTYPE = torch.bfloat16
DEVICE = "cuda"
# ============================================================
# Setup: Create Manager and Attention Layers
# Setup
# ============================================================
def create_manager():
"""Create and initialize HybridKVCacheManager with OffloadEngine."""
manager = HybridKVCacheManager(
num_gpu_slots=NUM_GPU_SLOTS,
num_cpu_blocks=NUM_CPU_BLOCKS,
block_size=BLOCK_SIZE,
)
# Initialize offload engine (this creates k_cache_gpu/cpu, v_cache_gpu/cpu)
manager.allocate_cache(
num_layers=NUM_LAYERS,
num_kv_heads=NUM_KV_HEADS,
head_dim=HEAD_DIM,
dtype=DTYPE,
)
return manager
def create_attention_layers(manager):
"""Create attention layers and bind KV cache."""
layers = []
for layer_id in range(NUM_LAYERS):
attn = Attention(
@@ -64,89 +67,145 @@ def create_attention_layers(manager):
num_kv_heads=NUM_KV_HEADS,
)
attn.layer_id = layer_id
# Bind KV cache from manager
k_cache, v_cache = manager.get_layer_cache(layer_id)
attn.k_cache = k_cache
attn.v_cache = v_cache
layers.append(attn.to(DEVICE))
return layers
def create_test_sequence(manager, num_chunks=3):
"""Create a test sequence and allocate blocks."""
total_tokens = num_chunks * CHUNK_SIZE
# ============================================================
# Pre-fill CPU cache with random data
# ============================================================
# Sequence only takes token_ids
seq = Sequence(token_ids=list(range(total_tokens)))
def prefill_cpu_cache(manager, num_blocks):
"""
Fill CPU cache with random KV data for num_blocks blocks.
This simulates having already processed many chunks.
"""
offload_engine = manager.offload_engine
# Set block_size for this test
seq.block_size = BLOCK_SIZE
for block_id in range(num_blocks):
# Generate random KV data for all layers
for layer_id in range(NUM_LAYERS):
k_data = torch.randn(
BLOCK_SIZE, NUM_KV_HEADS, HEAD_DIM,
dtype=DTYPE, device=DEVICE
)
v_data = torch.randn(
BLOCK_SIZE, NUM_KV_HEADS, HEAD_DIM,
dtype=DTYPE, device=DEVICE
)
# Allocate blocks (will be on CPU in CPU-primary mode)
manager.allocate(seq)
# Copy to CPU cache
offload_engine.k_cache_cpu[layer_id, block_id].copy_(k_data)
offload_engine.v_cache_cpu[layer_id, block_id].copy_(v_data)
return seq
return list(range(num_blocks))
# ============================================================
# Chunked Prefill Simulation
# Simulate N-way Pipeline (mirrors attention.py logic)
# ============================================================
def simulate_chunk_forward(
layers,
manager,
seq,
chunk_idx,
chunk_size,
def simulate_nway_pipeline(
layer_id: int,
q_batched: torch.Tensor,
cpu_block_table: list,
load_slots: list,
offload_engine,
scale: float,
):
"""
Simulate forward pass for one chunk through all layers.
Returns:
output: Final layer attention output
Simulate N-way pipeline for a single layer.
This mirrors the logic in Attention._ring_buffer_pipeline_load().
"""
# Generate random Q, K, V for this chunk
hidden = torch.randn(chunk_size, NUM_HEADS, HEAD_DIM, dtype=DTYPE, device=DEVICE)
num_blocks = len(cpu_block_table)
num_slots = len(load_slots)
# Build slot_mapping: maps token positions to GPU slots
write_slot = manager.offload_engine.get_write_slot_for_prefill(chunk_idx)
slot_mapping = torch.full((chunk_size,), write_slot * BLOCK_SIZE, dtype=torch.long, device=DEVICE)
slot_mapping += torch.arange(chunk_size, device=DEVICE)
o_acc, lse_acc = None, None
# Build cu_seqlens for flash attention
cu_seqlens = torch.tensor([0, chunk_size], dtype=torch.int32, device=DEVICE)
# Phase 1: Pre-load up to num_slots blocks
num_preload = min(num_slots, num_blocks)
torch.cuda.nvtx.range_push(f"Phase1_Preload: L{layer_id}")
for i in range(num_preload):
offload_engine.load_to_slot_layer(load_slots[i], layer_id, cpu_block_table[i])
torch.cuda.nvtx.range_pop()
# Set context for this chunk
set_context(
is_prefill=True,
is_chunked_prefill=True,
cu_seqlens_q=cu_seqlens,
cu_seqlens_k=cu_seqlens,
max_seqlen_q=chunk_size,
max_seqlen_k=chunk_size,
slot_mapping=slot_mapping,
kvcache_manager=manager,
chunked_seq=seq,
current_chunk_idx=chunk_idx,
)
# Phase 2: Main loop with compute_stream
compute_stream = offload_engine.compute_stream
# Forward through all layers
output = hidden
for block_idx in range(num_blocks):
torch.cuda.nvtx.range_push(f"Block: L{layer_id} B{block_idx}")
current_slot = load_slots[block_idx % num_slots]
# Wait for transfer
offload_engine.wait_slot_layer(current_slot, layer_id)
# Compute on dedicated stream
with torch.cuda.stream(compute_stream):
torch.cuda.nvtx.range_push(f"FlashAttn: L{layer_id} B{block_idx}")
prev_k, prev_v = offload_engine.get_kv_for_slot(current_slot, layer_id)
prev_o, prev_lse = flash_attn_with_lse(
q_batched, prev_k, prev_v,
softmax_scale=scale,
causal=False,
)
torch.cuda.nvtx.range_pop()
offload_engine.record_slot_compute_done(current_slot, layer_id)
# Start next transfer (reuse current_slot)
next_block_idx = block_idx + num_slots
if next_block_idx < num_blocks:
offload_engine.load_to_slot_layer(
current_slot, layer_id, cpu_block_table[next_block_idx]
)
# Merge
with torch.cuda.stream(compute_stream):
if o_acc is None:
o_acc, lse_acc = prev_o, prev_lse
else:
o_acc, lse_acc = merge_attention_outputs(o_acc, lse_acc, prev_o, prev_lse)
torch.cuda.nvtx.range_pop()
return o_acc, lse_acc
def simulate_full_forward(layers, manager, cpu_block_table, chunk_size):
"""
Simulate forward pass through all layers, loading previous blocks from CPU.
This is the key test: many blocks loaded via N-way pipeline.
"""
offload_engine = manager.offload_engine
# Current chunk index (we're processing the "next" chunk after all prefilled ones)
current_chunk_idx = len(cpu_block_table)
write_slot = offload_engine.get_write_slot_for_prefill(current_chunk_idx)
load_slots = offload_engine.get_load_slots_for_prefill(write_slot)
# Random query for attention
q = torch.randn(1, chunk_size, NUM_HEADS, HEAD_DIM, dtype=DTYPE, device=DEVICE)
outputs = []
for layer in layers:
k = torch.randn(chunk_size, NUM_KV_HEADS, HEAD_DIM, dtype=DTYPE, device=DEVICE)
v = torch.randn(chunk_size, NUM_KV_HEADS, HEAD_DIM, dtype=DTYPE, device=DEVICE)
output = layer.forward(output, k, v)
torch.cuda.nvtx.range_push(f"Layer: {layer.layer_id}")
# Offload current chunk to CPU
logical_id = seq.block_table[chunk_idx]
cpu_block_id = manager.logical_blocks[logical_id].cpu_block_id
manager.offload_engine.offload_slot_to_cpu(write_slot, cpu_block_id)
manager.prefilled_blocks.add(logical_id)
o_acc, lse_acc = simulate_nway_pipeline(
layer.layer_id,
q,
cpu_block_table,
load_slots,
offload_engine,
layer.scale,
)
return output
outputs.append(o_acc)
torch.cuda.nvtx.range_pop()
return outputs
# ============================================================
@@ -154,64 +213,81 @@ def simulate_chunk_forward(
# ============================================================
print("=" * 60)
print("Test: Attention Layer with KV Cache Offload")
print("Test: N-way Pipeline with CPU Offload")
print("=" * 60)
# 1. Setup
print("\n[1] Creating manager and attention layers...")
manager = create_manager()
layers = create_attention_layers(manager)
print(f" - Manager: {NUM_GPU_SLOTS} GPU slots, {NUM_CPU_BLOCKS} CPU blocks")
print(f" - Layers: {NUM_LAYERS} layers, {NUM_HEADS} heads, {HEAD_DIM} head_dim")
print(f" - OffloadEngine initialized: {manager.offload_engine is not None}")
offload_engine = manager.offload_engine
# 2. Setup
print("\n[2] Test configuration...")
NUM_CHUNKS = NUM_CPU_BLOCKS # Use all CPU blocks
print(f" - Total tokens: {NUM_CHUNKS * CHUNK_SIZE}")
print(f" - Chunks: {NUM_CHUNKS}")
print(f" - GPU slots: {NUM_GPU_SLOTS}")
print(f" - CPU blocks: {NUM_CPU_BLOCKS}")
print(f" - Per-slot streams: {len(offload_engine.slot_transfer_streams)}")
print(f" - Compute stream: {offload_engine.compute_stream}")
# 3. Warmup runs
print(f"\n[3] Warmup runs (3 iterations)...")
for warmup_iter in range(3):
manager.prefilled_blocks.clear()
seq = create_test_sequence(manager, num_chunks=NUM_CHUNKS)
# 2. Pre-fill CPU cache
NUM_PREV_BLOCKS = 12 # Many blocks to load via N-way pipeline
print(f"\n[2] Pre-filling {NUM_PREV_BLOCKS} blocks to CPU cache...")
cpu_block_table = prefill_cpu_cache(manager, NUM_PREV_BLOCKS)
print(f" - CPU blocks filled: {cpu_block_table}")
for chunk_idx in range(NUM_CHUNKS):
write_slot = manager.offload_engine.get_write_slot_for_prefill(chunk_idx)
output = simulate_chunk_forward(layers, manager, seq, chunk_idx, CHUNK_SIZE)
# 3. Verify pipeline configuration
current_chunk_idx = NUM_PREV_BLOCKS
write_slot = offload_engine.get_write_slot_for_prefill(current_chunk_idx)
load_slots = offload_engine.get_load_slots_for_prefill(write_slot)
print(f"\n[3] Pipeline configuration for chunk {current_chunk_idx}:")
print(f" - Write slot: {write_slot}")
print(f" - Load slots: {load_slots}")
print(f" - Pipeline depth (N-way): {len(load_slots)}")
assert len(load_slots) == NUM_GPU_SLOTS - 1, f"Expected {NUM_GPU_SLOTS - 1} load slots"
manager.deallocate(seq)
print(f" - Warmup {warmup_iter + 1}/3 completed")
# 4. Warmup
print("\n[4] Warmup (3 iterations)...")
for i in range(3):
outputs = simulate_full_forward(layers, manager, cpu_block_table, CHUNK_SIZE)
torch.cuda.synchronize()
print(f" - Warmup {i+1}/3 done")
# 4. Benchmark runs
print(f"\n[4] Benchmark runs (10 iterations)...")
for bench_iter in range(10):
manager.prefilled_blocks.clear()
seq = create_test_sequence(manager, num_chunks=NUM_CHUNKS)
# 5. Benchmark
NUM_ITERS = 10
print(f"\n[5] Benchmark ({NUM_ITERS} iterations)...")
for chunk_idx in range(NUM_CHUNKS):
write_slot = manager.offload_engine.get_write_slot_for_prefill(chunk_idx)
load_slots = manager.offload_engine.get_load_slots_for_prefill(write_slot)
output = simulate_chunk_forward(layers, manager, seq, chunk_idx, CHUNK_SIZE)
torch.cuda.synchronize()
start_event = torch.cuda.Event(enable_timing=True)
end_event = torch.cuda.Event(enable_timing=True)
manager.deallocate(seq)
print(f" - Iteration {bench_iter + 1}/10 completed")
start_event.record()
for i in range(NUM_ITERS):
torch.cuda.nvtx.range_push(f"Iteration_{i}")
outputs = simulate_full_forward(layers, manager, cpu_block_table, CHUNK_SIZE)
torch.cuda.nvtx.range_pop()
end_event.record()
# 5. Verify results (using last iteration's seq)
print("\n[5] Verifying ring buffer and offload...")
for chunk_idx in range(NUM_CHUNKS):
expected_slot = chunk_idx % NUM_GPU_SLOTS
actual_slot = manager.offload_engine.get_write_slot_for_prefill(chunk_idx)
assert actual_slot == expected_slot, f"Chunk {chunk_idx}: expected slot {expected_slot}, got {actual_slot}"
torch.cuda.synchronize()
elapsed_ms = start_event.elapsed_time(end_event)
cpu_block_table = manager.get_prefilled_cpu_blocks(seq)
assert cpu_block_table == seq.block_table[:NUM_CHUNKS], "CPU block table mismatch"
print(" - Ring buffer cycling verified ✓")
print(" - CPU offload verified ✓")
# Stats
total_blocks_loaded = NUM_PREV_BLOCKS * NUM_LAYERS * NUM_ITERS
blocks_per_sec = total_blocks_loaded / (elapsed_ms / 1000)
total_tokens = NUM_PREV_BLOCKS * BLOCK_SIZE * NUM_LAYERS * NUM_ITERS
tokens_per_sec = total_tokens / (elapsed_ms / 1000)
# Cleanup
manager.deallocate(seq)
print(f"\n[6] Results:")
print(f" - Total time: {elapsed_ms:.2f} ms")
print(f" - Per iteration: {elapsed_ms / NUM_ITERS:.2f} ms")
print(f" - Blocks loaded: {total_blocks_loaded} ({blocks_per_sec:.0f} blocks/s)")
print(f" - Tokens processed: {total_tokens} ({tokens_per_sec:.0f} tok/s)")
# 7. Verification
print("\n[7] Verification:")
assert len(outputs) == NUM_LAYERS, f"Expected {NUM_LAYERS} outputs"
for i, o in enumerate(outputs):
assert o is not None, f"Layer {i} output is None"
assert o.shape == (1, CHUNK_SIZE, NUM_HEADS, HEAD_DIM), f"Layer {i} shape mismatch"
print(" - All layer outputs valid ✓")
print(" - N-way pipeline executed correctly ✓")
# Cleanup
reset_context()